/*!
    \file  main.c
    \brief USART printf

    \version 2019-6-5, V1.0.0, firmware for skylark
*/

/*
    Copyright (c) 2019, GigaDevice Semiconductor Inc.

    Redistribution and use in source and binary forms, with or without modification, 
are permitted provided that the following conditions are met:

    1. Redistributions of source code must retain the above copyright notice, this 
       list of conditions and the following disclaimer.
    2. Redistributions in binary form must reproduce the above copyright notice, 
       this list of conditions and the following disclaimer in the documentation 
       and/or other materials provided with the distribution.
    3. Neither the name of the copyright holder nor the names of its contributors 
       may be used to endorse or promote products derived from this software without 
       specific prior written permission.

    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 
IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 
INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 
WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
OF SUCH DAMAGE.
*/


#include <stdio.h>

// See LICENSE for license details.

#include <stdlib.h>
//#include "nuclei_libopt.h"

#include "../../../../SoC/anlogic/Board/sf1_eval/Include/nuclei_sdk_hal.h"


void print_misa(void)
{
    CSR_MISA_Type misa_bits = (CSR_MISA_Type) __RV_CSR_READ(CSR_MISA);
    static char misa_chars[30];
    uint8_t index = 0;
    if (misa_bits.b.mxl == 1) {
        misa_chars[index++] = '3';
        misa_chars[index++] = '2';
    } else if (misa_bits.b.mxl == 2) {
        misa_chars[index++] = '6';
        misa_chars[index++] = '4';
    } else if (misa_bits.b.mxl == 3) {
        misa_chars[index++] = '1';
        misa_chars[index++] = '2';
        misa_chars[index++] = '8';
    }
    if (misa_bits.b.i) {
        misa_chars[index++] = 'I';
    }
    if (misa_bits.b.m) {
        misa_chars[index++] = 'M';
    }
    if (misa_bits.b.a) {
        misa_chars[index++] = 'A';
    }
    if (misa_bits.b.b) {
        misa_chars[index++] = 'B';
    }
    if (misa_bits.b.c) {
        misa_chars[index++] = 'C';
    }
    if (misa_bits.b.e) {
        misa_chars[index++] = 'E';
    }
    if (misa_bits.b.f) {
        misa_chars[index++] = 'F';
    }
    if (misa_bits.b.d) {
        misa_chars[index++] = 'D';
    }
    if (misa_bits.b.q) {
        misa_chars[index++] = 'Q';
    }
    if (misa_bits.b.h) {
        misa_chars[index++] = 'H';
    }
    if (misa_bits.b.j) {
        misa_chars[index++] = 'J';
    }
    if (misa_bits.b.l) {
        misa_chars[index++] = 'L';
    }
    if (misa_bits.b.n) {
        misa_chars[index++] = 'N';
    }
    if (misa_bits.b.s) {
        misa_chars[index++] = 'S';
    }
    if (misa_bits.b.p) {
        misa_chars[index++] = 'P';
    }
    if (misa_bits.b.t) {
        misa_chars[index++] = 'T';
    }
    if (misa_bits.b.u) {
        misa_chars[index++] = 'U';
    }
    if (misa_bits.b.x) {
        misa_chars[index++] = 'X';
    }

    misa_chars[index++] = '\0';

    printf("MISA: RV%s\r\n", misa_chars);
}

#define LEDn  3

static uint32_t LED_CLORK[] = {SOC_LED_RED_GPIO_MASK, SOC_LED_GREEN_GPIO_MASK,SOC_LED_BLUE_GPIO_MASK};
uint32_t PPS1_4,PPS5_8;
uint8_t PPS1,PPS2,PPS3,PPS4,PPS5,PPS6,PPS7,PPS8; 
uint32_t dsc_reg_c;  
void fpga7_handler(void)
{
    //printf("enter irq !\n\r");
    // put DLM data to DSC 
   // temp = REG32(0x20001000);
   // REG32(0xE0000000 + 0x70030) = temp;
    PPS1_4 =  REG32(0x20001000);
    PPS5_8 =  REG32(0x20001004);
    PPS1 = PPS1_4; 
    PPS2 = PPS1_4 >> 8;
    PPS3 = PPS1_4 >> 16; 
    PPS4 = PPS1_4 >> 24;
    PPS5 = PPS5_8 >> 8; 
    dsc_reg_c = (PPS3 & (0xF0)  >> 4) &                  // bit_per_comt 
                ((PPS4 & (0x10) >> 4) << 4)     &      // convert_rgb 
                ((PPS4 & (0x04) >> 3) << 5)     &      // simple_422
                ((PPS3 & (0x0F)     ) << 6)     &      
                ((PPS5 & (0xFF)     ) << 10)    &      // bits_per_pixel[7:0] 
                ((PPS4 & (0x03)     ) << 18)    &      // bits_per_pixel[9:8]   
                ((PPS4 & (0x20) >> 5) << 20)    &      // block_pred_enable
                //((PPS88 & (0x)     ) << 10)    &      // native_420
               // ((PPS88 & (0xFF)     ) << 10)    &      // native_422 
                ((PPS1 & (0x0F)     ) << 28)  ;        // dsc_version_minor 
       REG32(0xE0000000 + 0x7000C) = dsc_reg_c;
                                    ; 

    // create negedge of gpio0       
    gpio_write(GPIO,LED_CLORK[0],1);
    gpio_write(GPIO,LED_CLORK[0],0);
    
}

/*!
    \brief      main function
    \param[in]  none
    \param[out] none
    \retval     none
*/
int main(void)
{
    int i  = 0;
     __RV_CSR_SET(CSR_MCACHE_CTL, CSR_MCACHE_CTL_IE);
     __RV_CSR_SET(CSR_MCACHE_CTL, CSR_MCACHE_CTL_DE);
    printf("usart init has been done!\n\r");

    srand(__get_rv_cycle()  | __get_rv_instret() | __RV_CSR_READ(CSR_MCYCLE));
    uint32_t rval = rand();
    rv_csr_t misa = __RV_CSR_READ(CSR_MISA);
    printf("MISA: 0x%lx\r\n", misa);
    print_misa();
//  MCU 
// 9 DSI1   up       psel2
// 7 DSC    |        psel0
// 8 DSI0   down     psel1
    
	// ******************  DSI0 APB config *********************
	// PHY_DIG_TO_0_OS
	REG32(0xE0000000 + 0x80148) = 0x15650000; 
    while ( !(REG32(0xE0000000 + 0x80148) == 0x15650000)){
      i++; 
    }

	// PWR_UP_QST_OS
    REG32(0xE0000000 + 0x80000) = 0x00000001; 
    while ( !(REG32(0xE0000000 + 0x80000) == 0x20200601)){
      i++; 
    }
	// PHY_RSTZ_OS
    REG32(0xE0000000 + 0x800b0) = 0x0000000f; 
    while ( !(REG32(0xE0000000 + 0x800b0) == 0x0000000f)){
      i++; 
	}
	// CLKMGR_CFG_QST_OS
    REG32(0xE0000000 + 0x80004) = 0x00000c0c; 
    while ( !(REG32(0xE0000000 + 0x80004) == 0x00000c0c)){
      i++; 
    }
	// PHY_DIG_CTRL0_OS
    //REG32(0xE0000000 + 0x80128) = 0x00122001; 
    REG32(0xE0000000 + 0x80130) = 0x00132001; 
    while ( !(REG32(0xE0000000 + 0x80130) == 0x00132001)){
      i++; 
    }
	// PHY_DIG_TO_1_OS
	REG32(0xE0000000 + 0x8014c) = 0xe0c13880; 
    while ( !(REG32(0xE0000000 + 0x8014c) == 0xe0c13880)){
      i++; 
    }
	// PHY_DIG_TO_2_OS
	REG32(0xE0000000 + 0x80150) = 0x5181375a; 
    while ( !(REG32(0xE0000000 + 0x80150) == 0x5181375a)){
      i++; 
    }
	// PHY_DIG_TO_3_OS
	REG32(0xE0000000 + 0x80154) = 0x00a082ca; 
    while ( !(REG32(0xE0000000 + 0x80154) == 0x00a082ca)){
      i++; 
    }

	// ******************  DSI1 APB config *********************
	// CLKMGR_CFG_QST_OS
    REG32(0xE0000000 + 0x90004) = 0x00000010; 
    while ( !(REG32(0xE0000000 + 0x90004) == 0x00000010)){
     i++;
    }
	// MODE_CFG_OS
    REG32(0xE0000000 + 0x90020) = 0x00000000; 
    while ( !(REG32(0xE0000000 + 0x90020) == 0x00000000)){
     i++;
    }

	// PHY_IF_CFG_QST_OS
    REG32(0xE0000000 + 0x900b4) = 0x00000003; 
    while ( !(REG32(0xE0000000 + 0x900b4) == 0x00000003)){
     i++;
    }

	// PCKHDL_CFG_QST_OS
    REG32(0xE0000000 + 0x90018) = 0x00000001; 
    while ( !(REG32(0xE0000000 + 0x90018) == 0x00000001)){
     i++;
    }

//	// VID_MODE_CFG_QST_OS
//    REG32(0xE0000000 + 0x90024) = 0x00000002; 
//    while ( !(REG32(0xE0000000 + 0x90024) == 0x00000002)){
//     i++;
//    }
	// DPI_COLOR_CODING_QST_OS
    REG32(0xE0000000 + 0x9000c) = 0x00000005; 
    while ( !(REG32(0xE0000000 + 0x9000c) == 0x00000005)){
     i++;
    }


// **********************
// Adding enable line LP 
	// VID_MODE_CFG
    REG32(0xE0000000 + 0x90024) = 0x0000ff02; 
    while ( !(REG32(0xE0000000 + 0x90024) == 0x0000ff02)){
     i++;
    }

	// PHY_TMR_LPCLK_CFG
    REG32(0xE0000000 + 0x900a4) = 0x000a000a; 
    while ( !(REG32(0xE0000000 + 0x900a4) == 0x000a000a)){
     i++;
    }

	// PHY_TMR_CFG
    REG32(0xE0000000 + 0x900a8) = 0x002d0037; 
    while ( !(REG32(0xE0000000 + 0x900a8) == 0x002d0037)){
     i++;
    }


// **********************
	// Format=1440*3200*60(1500*3400*60), dpiClk=306Mhz(3.26ns)
	// RefClk=266,
	// pllPre='d,pllPost='d,pllZone='d1,
	// hlineTime=1500,hsa_time=3,hbp_time=2;pkt_size=1440,numChunk=1;hfp=
	// vsa_line=1,vbp_line=1,vfp=1
	// num_base= 1.018913
	
	// VID_HLINE_TIME_QST_OS;
    //REG32(0xE0000000 + 0x9003c) = 0x00000948; 
    REG32(0xE0000000 + 0x9003c) = 0x000004fa;  //totoal pix=1000*num_base
    while ( !(REG32(0xE0000000 + 0x9003c) == 0x000004fa)){
     i++;
    }
	// VID_PKT_SIZE_QST_OS
    //REG32(0xE0000000 + 0x90028) = 0x00000b40; //Modify 2880
    REG32(0xE0000000 + 0x90028) = 0x00002d0;  // 144
    while ( !(REG32(0xE0000000 + 0x90028) == 0x00002d0)){
     i++;
    }
	// VID_NUM_CHUNKS_QST_OS
    REG32(0xE0000000 + 0x9002c) = 0x00000001; //10 
    while ( !(REG32(0xE0000000 + 0x9002c) == 0x00000001)){
     i++;
    }
	// VID_NULL_SIZE_QST_OS
    REG32(0xE0000000 + 0x90030) = 0x00000000; 
    while ( !(REG32(0xE0000000 + 0x90030) == 0x00000000)){
     i++;
    }
	// VID_HSA_TIME_QST_OS
    REG32(0xE0000000 + 0x90034) = 0x0000001d; 
    while ( !(REG32(0xE0000000 + 0x90034) == 0x0000001d)){
     i++;
    }
	// VID_HBP_TIME_QST_OS
    REG32(0xE0000000 + 0x90038) = 0x00000079; 
    while ( !(REG32(0xE0000000 + 0x90038) == 0x00000079)){
     i++;
    }
	// VID_VSA_TIME_QST_OS
    REG32(0xE0000000 + 0x90040) = 0x00000006; 
    while ( !(REG32(0xE0000000 + 0x90040) == 0x00000006)){
     i++;
    }
	// VID_VBP_LINES_QST_OS
    REG32(0xE0000000 + 0x90044) = 0x0000000f; 
    while ( !(REG32(0xE0000000 + 0x90044) == 0x0000000f)){
     i++;
    }
	// VID_VFP_LINES_QST_OS
    REG32(0xE0000000 + 0x90048) = 0x00000014; 
    while ( !(REG32(0xE0000000 + 0x90048) == 0x00000014)){
     i++;
    }
	// VID_VACTIVE_LINES_QST_OS
    REG32(0xE0000000 + 0x9004c) = 0x00000640; 
    while ( !(REG32(0xE0000000 + 0x9004c) == 0x00000640)){
     i++;
    }
	// DPI_CFG_POL_QST_OS
    REG32(0xE0000000 + 0x90010) = 0x00000000; 
    while ( !(REG32(0xE0000000 + 0x90010) == 0x00000000)){
     i++;
    }
// ***************************
//
	// TX_PLL_OS
    REG32(0xE0000000 + 0x9012c) = 0x31000d03 ; 
    while ( !(REG32(0xE0000000 + 0x9012c) == 0x31000d03)){
     i++;
    }
	// PHY_DIG_CTRL0_OS
    REG32(0xE0000000 + 0x90130) = 0x00112101 ; 
    while ( !(REG32(0xE0000000 + 0x90130) == 0x00112101)){
     i++;
    }
	// PHY_DIG_TO_0_OS
    REG32(0xE0000000 + 0x90148) = 0x1665277e; 
    while ( !(REG32(0xE0000000 + 0x90148) == 0x1665277e)){
     i++;
    }
	// PHY_DIG_TO_1_OS
    REG32(0xE0000000 + 0x9014c) = 0xe0d13880; 
    while ( !(REG32(0xE0000000 + 0x9014c) == 0xe0d13880)){
     i++;
    }
	// PHY_DIG_TO_2_OS
    REG32(0xE0000000 + 0x90150) = 0x51813757; 
    while ( !(REG32(0xE0000000 + 0x90150) == 0x51813757)){
     i++;
    }
	// PHY_DIG_TO_3_OS
    REG32(0xE0000000 + 0x90154) = 0x00f082ca; 
    while ( !(REG32(0xE0000000 + 0x90154) == 0x00f082ca)){
     i++;
    }
	// PHY_STATUS_OS(Wait PLL lock)
	//while (!(GET_BITS(REG32(0xE0000000 + 0x900b8),0,1)==1)) {
	//	i++
	//}
	while ( !(REG32(0xE0000000 + 0x900c0) == 0x00012499)){
     i++;
    }
	// PHY_RSTZ_OS
    REG32(0xE0000000 + 0x900b0) = 0x00000007; 
    while ( !(REG32(0xE0000000 + 0x900b0) == 0x00000007)){
     i++;
    }
	// Skew between phy_rst and pwr_up_qst
	
	// PWR_UP_QST_OS
    REG32(0xE0000000 + 0x90000) = 0x00000011 ; 
    while ( !(REG32(0xE0000000 + 0x90000) == 0x20200611)){
     i++;
    }
	// PHY_STATUS_OS(Wait for inital time)
	//while ( !(REG32(0xE0000000 + 0x900b8) == 0x0001b6d1)){
    // i++;
    //}
	// LPCLK_CTRL_QST_OS
    REG32(0xE0000000 + 0x900a0) = 0x00000001; 
    while ( !(REG32(0xE0000000 + 0x900a0) == 0x00000001)){
     i++;
    }

	// ******************  DSC APB config *********************
//write to register addr = 0x00, value = 0x00000000 
    REG32(0xE0000000 + 0x70000) = 0x00000000; 
	while ( !(REG32(0xE0000000 + 0x70000) == 0x00000000)){
     i++;
    }
//write to register addr = 0x04, value = 0x035c1072 
    //REG32(0xE0000000 + 0x70004) = 0x06bc1072; 
    REG32(0xE0000000 + 0x70010) = 0x035c1072; 
	while ( !(REG32(0xE0000000 + 0x70010) == 0x035c1072)){
     i++;
    }
//write to register addr = 0x0c, value =  0x10120258
    //REG32(0xE0000000 + 0x7000c) = 0x10120258; 
    REG32(0xE0000000 + 0x70030) = 0x10120258; 
	while ( !(REG32(0xE0000000 + 0x70030) == 0x10120258)){
     i++;
    }
//write to register addr = 0x0d, value = 0x0c8005a0 
    //REG32(0xE0000000 + 0x7000d) = 0x09d80438; 
    //REG32(0xE0000000 + 0x70034) = 0x09d80438; 
    //REG32(0xE0000000 + 0x70034) = 0x005005a0;  // 80 line only 
    REG32(0xE0000000 + 0x70034) = 0x0c8005a0;  // 3200 line 
    //REG32(0xE0000000 + 0x70034) = 0x00a005a0;  // 160 line 
	while ( !(REG32(0xE0000000 + 0x70034) == 0x0c8005a0)){
     i++;
    }
//write to register addr = 0x0e, value =0x005002d0  
    //REG32(0xE0000000 + 0x7000e) = 0x007e0438; 
    REG32(0xE0000000 + 0x70038) = 0x005002d0; 
	while ( !(REG32(0xE0000000 + 0x70038) == 0x005002d0)){
     i++;
    }
//write to register addr = 0x0f, value =  0x000002d0
    //REG32(0xE0000000 + 0x7000f) = 0x00000438; 
    REG32(0xE0000000 + 0x7003c) = 0x000002d0; 
	while ( !(REG32(0xE0000000 + 0x7003c) == 0x000002d0)){
     i++;
    }
//write to register addr = 0x10, value =  0x02c20200
    //REG32(0xE0000000 + 0x70010) = 0x03a30200; 
    REG32(0xE0000000 + 0x70040) = 0x02c20200; 
	while ( !(REG32(0xE0000000 + 0x70040) == 0x02c20200)){
     i++;
    }
//write to register addr = 0x11, value =  0x00000020
    //REG32(0xE0000000 + 0x70011) = 0x00000020; 
    REG32(0xE0000000 + 0x70044) = 0x00000020; 
	while ( !(REG32(0xE0000000 + 0x70044) == 0x00000020)){
     i++;
    }
//write to register addr = 0x12, value =  0x000a07d0
    //REG32(0xE0000000 + 0x70012) = 0x000f0e28; 
    REG32(0xE0000000 + 0x70048) = 0x000a07d0; 
	while ( !(REG32(0xE0000000 + 0x70048) == 0x000a07d0)){
     i++;
    }
//write to register addr = 0x13, value = 0x0000000f 
    //REG32(0xE0000000 + 0x70013) = 0x0000000f; 
    REG32(0xE0000000 + 0x7004c) = 0x0000000f; 
	while ( !(REG32(0xE0000000 + 0x7004c) == 0x0000000f)){
     i++;
    }
//write to register addr = 0x14, value =  0x00f50185
    //REG32(0xE0000000 + 0x70014) = 0x006800f6; 
    REG32(0xE0000000 + 0x70050) = 0x00f50185; 
	while ( !(REG32(0xE0000000 + 0x70050) == 0x00f50185)){
     i++;
    }
//write to register addr = 0x15, value =  0x10f01800
    //REG32(0xE0000000 + 0x70015) = 0x10f01800; 
    REG32(0xE0000000 + 0x70054) = 0x10f01800; 
	while ( !(REG32(0xE0000000 + 0x70054) == 0x10f01800)){
     i++;
    }
//write to register addr = 0x16, value = 0x00000000 
    //REG32(0xE0000000 + 0x70016) = 0x00000000; 
    REG32(0xE0000000 + 0x70058) = 0x00000000; 
	while ( !(REG32(0xE0000000 + 0x70058) == 0x00000000)){
     i++;
    }
//write to register addr = 0x17, value =  0x00000983
    //REG32(0xE0000000 + 0x70017) = 0x00000983; 
    REG32(0xE0000000 + 0x7005c) = 0x00000983; 
	while ( !(REG32(0xE0000000 + 0x7005c) == 0x00000983)){
     i++;
    }
//write to register addr = 0x18, value = 0x00002000 
    //REG32(0xE0000000 + 0x70018) = 0x00002000; 
    REG32(0xE0000000 + 0x70060) = 0x00002000; 
	while ( !(REG32(0xE0000000 + 0x70060) == 0x00002000)){
     i++;
    }
//write to register addr = 0x19, value = 0x0331ef06 
    //REG32(0xE0000000 + 0x70019) = 0x03316b06; 
    REG32(0xE0000000 + 0x70064) = 0x0331ef06; 
	while ( !(REG32(0xE0000000 + 0x70064) == 0x0331ef06)){
     i++;
    }
//write to register addr = 0x1a, value = 0x382a1c0e 
    //REG32(0xE0000000 + 0x7001a) = 0x382a1c0e; 
    REG32(0xE0000000 + 0x70068) = 0x382a1c0e; 
	while ( !(REG32(0xE0000000 + 0x70068) == 0x382a1c0e)){
     i++;
    }
//write to register addr = 0x1b, value = 0x69625446 
    //REG32(0xE0000000 + 0x7001b) = 0x69625446; 
    REG32(0xE0000000 + 0x7006c) = 0x69625446; 
	while ( !(REG32(0xE0000000 + 0x7006c) == 0x69625446)){
     i++;
    }
//write to register addr = 0x1c, value = 0x7b797770 
    //REG32(0xE0000000 + 0x7001c) = 0x7b797770; 
    REG32(0xE0000000 + 0x70070) = 0x7b797770; 
	while ( !(REG32(0xE0000000 + 0x70070) == 0x7b797770)){
     i++;
    }
//write to register addr = 0x1d, value = 0x00007e7d 
    //REG32(0xE0000000 + 0x7001d) = 0x00007e7d; 
    REG32(0xE0000000 + 0x70074) = 0x00007e7d; 
	while ( !(REG32(0xE0000000 + 0x70074) == 0x00007e7d)){
     i++;
    }
//write to register addr = 0x1e, value =  0x00308400
    //REG32(0xE0000000 + 0x7001e) = 0x00308400; 
    REG32(0xE0000000 + 0x70078) = 0x00308400; 
	while ( !(REG32(0xE0000000 + 0x70078) == 0x00308400)){
     i++;
    }
//write to register addr = 0x1f, value =  0x00418c63
    //REG32(0xE0000000 + 0x7001f) = 0x00418c63; 
    REG32(0xE0000000 + 0x7007c) = 0x00418c63; 
	while ( !(REG32(0xE0000000 + 0x7007c) == 0x00418c63)){
     i++;
    }
//write to register addr = 0x20, value =  0x00c414a5
    //REG32(0xE0000000 + 0x70020) = 0x00c414a5; 
    REG32(0xE0000000 + 0x70080) = 0x00c414a5; 
	while ( !(REG32(0xE0000000 + 0x70080) == 0x00c414a5)){
     i++;
    }
//write to register addr = 0x21, value =  0x00731484
    //REG32(0xE0000000 + 0x70021) = 0x00731484; 
    REG32(0xE0000000 + 0x70084) = 0x00731484; 
	while ( !(REG32(0xE0000000 + 0x70084) == 0x00731484)){
     i++;
    }
//write to register addr = 0x22, value =  0x00a4a0e7
    //REG32(0xE0000000 + 0x70022) = 0x00a4a0e7; 
    REG32(0xE0000000 + 0x70088) = 0x00a4a0e7; 
	while ( !(REG32(0xE0000000 + 0x70088) == 0x00a4a0e7)){
     i++;
    }
//write to register addr = 0x23, value =  0x00d62d6a
    //REG32(0xE0000000 + 0x70023) = 0x00d62d6a; 
    REG32(0xE0000000 + 0x7008c) = 0x00d62d6a; 
	while ( !(REG32(0xE0000000 + 0x7008c) == 0x00d62d6a)){
     i++;
    }
//write to register addr = 0x24, value = 0x3cf80002 
    //REG32(0xE0000000 + 0x70024) = 0x3cf80002; 
    REG32(0xE0000000 + 0x70090) = 0x3cf80002; 
	while ( !(REG32(0xE0000000 + 0x70090) == 0x3cf80002)){
     i++;
    }
//write to register addr = 0x25, value = 0x36e38e3a 
    //REG32(0xE0000000 + 0x70025) = 0x36e38e3a; 
    REG32(0xE0000000 + 0x70094) = 0x36e38e3a; 
	while ( !(REG32(0xE0000000 + 0x70094) == 0x36e38e3a)){
     i++;
    }

//write to register addr = 0x26, value = 0x34d34db6 
    //REG32(0xE0000000 + 0x70026) = 0x34d34db6; 
    REG32(0xE0000000 + 0x70098) = 0x34d34db6; 
	//while ( !(REG32(0xE0000000 + 0x70098) == 0x00000000)){
    // i++;
    //}


// *********************************************
// Dynamic pps process
// *********************************************
// CPU to trigger (riscv_gpio0_out)

   __enable_irq();
	ECLIC_Register_IRQ(FPGA7_IRQn, ECLIC_NON_VECTOR_INTERRUPT,
                                    ECLIC_LEVEL_TRIGGER, 1, 1,
                                    fpga7_handler);	



// notice the CPU through IRQ 
        gpio_write(GPIO,LED_CLORK[0],1);


    
// notice the CPU through IRQ 
        gpio_write(GPIO,LED_CLORK[0],0);


     //  while (gpio_read(GPIO,LED_CLORK[0]));
       for (i=0; i< 3;i++){
         printf("wait for irq\n\r");
         }

// While one for delay mcu terminal
	while ( !(REG32(0xE0000000 + 0x70098) == 0x00000000)){
     i++;
    }
    #ifdef CFG_SIMULATION
        pass_fail_simulation(1);
    #endif 
    while(1);

}


